IBM has unveiled an innovative solution in the field of neural networks— an analogue in-memory integrated circuit (IC). This IC leverages phase-change memory to store weights as analogue levels of conductance, enabling analogue multiply-accumulate calculations. To achieve successful analogue AI processing, IBM acknowledges the need to tackle two key challenges. Firstly, the memory arrays must exhibit precision comparable to existing digital systems. Secondly, seamless interfacing with digital compute units and the chip's digital communication fabric is crucial.
Fabricated in-house with back-end phase-change memory technology, the 14nm CMOS IC consists of 64 analogue in-memory computing tiles. Each tile features a 256 x 256 crossbar array of synaptic unit cells. Interface-wise, each tile is equipped with analog-to-digital converters (ADCs) to facilitate interaction with the digital side of the IC. Additionally, lightweight digital processing units are integrated into each tile to handle simple nonlinear neuronal activation functions and scaling operations. Moreover, a global digital processing unit resides in the center of the chip, executing more complex operations vital for certain types of neural networks.
The implementation of these tiles allows for the realization of a distributed neural network (DNN) model, with weight accuracy approximately equivalent to 3-bit or 4-bit precision. The IC demonstrates an impressive 400 Giga-operations per second per square millimeter (Gop/s/mm2) density for 8-bit input-output matrix vector multiplication. It achieved peak performance of 63 Tera-operations per second (Top/s) with an energy efficiency of 9.76 Tera-operations per second per Watt (Top/W). Nature Electronics will soon publish a paper titled "A 64-bit mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference," providing detailed insights into this groundbreaking work by IBM.
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